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AUIRS2336S
A
B
C
D
E
HINx
LINx
EN
ITRIP
FAULT
RCIN
HOx
LOx
Figure 5: Input/output timing diagram for AUIRS2336S
Figure 6: Detailed view of B & C intervals
Deadtime
This HVIC features integrated deadtime protection circuitry. The deadtime for this ICs is fixed; other ICs within IR’s
HVIC portfolio feature programmable deadtime for greater design flexibility. The deadtime feature inserts a time
period (a minimum deadtime) in which both the high- and low-side power switches are held off; this is done to ensure
that the power switch being turned off has fully turned off before the second power switch is turned on. This
minimum deadtime is automatically inserted whenever the external deadtime is shorter than DT; external deadtimes
larger than DT are not modified by the gate driver. Figure 7 illustrates the deadtime period and the relationship
between the output gate signals.
The deadtime circuitry of the AUIRS2336S is matched with respect to the high- and low-side outputs of a given
channel; additionally, the deadtimes of each of the three channels are matched. Figure 7 defines the two deadtime
parameters (i.e., DT 1 and DT 2 ) of a specific channel; the deadtime matching parameter (MDT) associated with the
AUIRS2336S specifies the maximum difference between DT 1 and DT 2 . The MDT parameter also applies when
comparing the DT of one channel of the AUIRS2336S to that of another.
www.irf.com
16
? 2009 International Rectifier
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